1. Field of the Invention
The present invention relates to a thin film transistor, a method of producing the thin film transistor, a liquid crystal display, and a thin film forming apparatus. More particularly, the present invention relates to the structure of a gate insulating film in a thin film transistor of the reverse stagger type.
2. Description of the Related Art
FIG. 14 concerns with a conventional ordinary liquid crystal display using thin film transistors (hereinafter referred to as TFTs), and illustrates one example of the structure of a TFT array board including TFTs of the reverse stagger type, gate lines, source lines, etc. In such a TFT array board, as shown in FIG. 14, gate lines 50 and source lines 51 are arranged on a transparent substrate in a matrix pattern. Each of areas surrounded by the gate lines 50 and the source lines 51 serves as one pixel 52, and a TFT 53 is provided for each pixel 52. FIG. 15 is a sectional view showing a construction of the TFT 53.
In the TFT 53, as shows in FIG. 15, a gate electrode 55 led out of the gate line 50 is formed on a transparent substrate 54, and a gate insulating film 56 is formed in covering relation to the gate electrode 55. A semiconductor active film 57 made of amorphous silicon (a-Si) is formed on the gate insulating film 56 at a position above the gate electrode 55. A source electrode 59 led out of the source line 51 and a drain electrode 60 are formed to extend over the semiconductor active film 57 through an ohmic contact layer 58 which is made of amorphous silicon (a-Si:n+) containing an n-type impurity such as phosphorous, and then on the gate insulating film 56. A passivation film 61 is formed in covering relation to the TFT 53 made up of the source electrode 59, the drain electrode 60, the gate electrode 55, etc., and a contact hole 62 is formed in the passivation film 61 at a position above the drain electrode 60. Further, a pixel electrode 63 formed of a transparent conductive film, such as indium tin oxide (hereinafter referred to as ITO), is filled in the contact hole 62 for electrical connection to the drain electrode 60.
Of the components of the TFT thus constructed, the gate insulating film located between the gate electrode and the semiconductor active film is the most important component that dominates electrical characteristics and reliability of the TFT. Also, the gate insulating film is a factor responsible for the occurrence of surface defects. For an amorphous-silicon TFT using amorphous silicon as a material of the semiconductor active film, a redundant structure endurable against defects has been tried by employing a two-layered gate insulating film structure wherein gate insulating films are formed as two stacked layers using different materials and different methods. In one example of such a structure, the two stacked layers are a dense film of Ta2O5 formed by anode-oxidizing tantalum (Ta) of the gate electrode and a film of Si3N4 deposited by the plasma CVD.
Regarding electrical characteristics of the TFT, generally-demanded capabilities of the gate insulating film are represented by a dielectric withstand voltage and a carrier mobility in the semiconductor active film. The dielectric withstand voltage is a problem inherently depending on the gate insulating film itself, whereas the carrier mobility in the semiconductor active film is affected by an interface characteristic between the gate insulating film and the semiconductor active film.
The term “dielectric withstand voltage” means a maximum voltage until which the gate insulating film is endurable against dielectric breakdown in a test wherein the voltage applied between the gate electrode and the semiconductor active film is increased gradually if the dielectric withstand voltage is lower than a desired design value, the gate insulating film would be liable to break down, thus resulting in an operation failure of the TFT and hence a display failure.
Also, the term “mobility” means an index indicating easiness in movement of carries within the TFT. A larger value of the mobility represents a greater driving ability and a higher-speed operation of the TFT. The mobility lowers if traveling of carriers is impeded due to disorder of a semiconductor crystal and the presence of impurities. Taking electrons in silicon as an example, the mobility of electrons is about 1000 cm2/V·sec in a single crystal. However, the mobility lowers down to the order of 0-100 cm2/V·sec in polycrystalline silicon, and further down to the order of 0.3-1 cm2/V·sec in amorphous silicon. In other words, because the mobility lowers in the case of using amorphous silicon due to the inherent property, there has been a demand for maintaining the mobility as high as possible even to a small extent in such a case.
Although the dielectric withstand voltage and the carrier mobility are, as described above, important factors in achieving TFTs with good electrical characteristics and high reliability, the materials which have been usually employed for the gate insulating film in the past are not satisfactory from points of both the dielectric withstand voltage and the carrier mobility. Also, although it has been hitherto proposed to combine two kinds of layers for giving the gate insulating film desired capabilities like the above-mentioned example of the two-layered structure of Ta2O5 and Si3N4, this method has such problems that the step of forming the gate insulating film is complicated and the productivity of TFT array boards is deteriorated.